1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method thereof, the semiconductor device comprising: a semiconductor substrate which includes, on one side, an integrated circuit and a plurality of connection pads connected to this integrated circuit; an insulating film provided on the one side of the semiconductor substrate except for the plurality of connection pads; a plurality of wiring lines which are provided to be electrically connected to the integrated circuit via the connection pads and which have connection pad portions; a plurality of projecting or columnar electrodes provided on one side of the connection pad portions of the wiring lines; and a sealing film which covers the integrated circuit and which is provided on the peripheries of the projecting electrodes.
2. Description of the Related Art
A semiconductor device called a chip size package (CSP) in Jpn. Pat. Appln. KOKAI Publication No. 2004-342876 (FIG. 6) comprises: a plurality of wiring lines provided on a semiconductor substrate; columnar electrodes provided on the upper surfaces of connection pad portions of the wiring lines; a sealing film made of, for example, an epoxy resin provided on the semiconductor substrate and the wiring lines so that the upper surface of this sealing film is flush with the upper surfaces of the columnar electrodes; and solder balls provided on the upper surfaces of the columnar electrodes.
In this conventional semiconductor device, the upper surface side of the semiconductor substrate can be protected against pollution from external atmosphere and against damage owing to the sealing film made of, for example, the epoxy resin, but this semiconductor device has a problem of not being able to suppress unnecessary electromagnetic radiant noise from the upper surface side of the semiconductor substrate to the outside or from the outside to the upper surface side of the semiconductor substrate.
Patent Publication No. 3540729 has disclosed another semiconductor device comprising a spiral thin film induction element in a chip size package (CSP).
In this conventional semiconductor device, the spiral thin film induction element is provided on the upper surface of a protective film, so that an eddy current loss is caused in the thin film induction element by an eddy current generated in a semiconductor substrate, leading to a problem of deteriorated characteristics (a decreased Q value) of the thin film induction element.